HDL Code Generation Report Summary for EightBitHarness
Summary
|
Model
|
EightBitHarness
|
|
Model version
|
1.3
|
|
HDL Coder version
|
24.2
|
|
HDL code generated on
|
2025-03-31 14:59:21
|
|
HDL code generated for
|
Eight_bit_Wallace
|
|
Target Language
|
VHDL
|
|
Target Directory
|
wallace_bas\hdlsrc
|
Non-default model properties
|
Backannotation
|
on
|
|
CriticalPathEstimation
|
on
|
|
GenerateCoSimModel
|
Vivado Simulator
|
|
GenerateValidationModel
|
on
|
|
GeneratedModelName
|
gm_EightBitHarness
|
|
HDLSubsystem
|
Eight_bit_Wallace
|
|
ProjectFolder
|
wallace_bas
|
|
ResetType
|
Synchronous
|
|
SimulationTool
|
Xilinx Vivado Simulator
|
|
SynthesisTool
|
Xilinx Vivado
|
|
SynthesisToolChipFamily
|
Artix7
|
|
SynthesisToolDeviceName
|
xc7a35t
|
|
SynthesisToolPackageName
|
cpg236
|
|
SynthesisToolSpeedValue
|
-1
|
|
TargetDirectory
|
wallace_bas\hdlsrc
|
|
TargetFrequency
|
100
|
|
Traceability
|
on
|
Non-default block properties
No blocks found with non-default properties.